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Cover: 9780521769921 | Microprocessor Architecture | Jean-Loup Baer | Buch | Englisch | 2013
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Microprocessor Architecture
From Simple Pipelines to Chip Multiprocessors
Buch von Jean-Loup Baer
Sprache: Englisch

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Beschreibung
This book describes the architecture of microprocessors from simple in-order short pipeline designs to out-of-order superscalars.
This book describes the architecture of microprocessors from simple in-order short pipeline designs to out-of-order superscalars.
Über den Autor
Jean-Loup Baer is Professor Emeritus of Computer Science and Engineering at the University of Washington, where he has been since 1969. Professor Baer is the author of Computer Systems Architecture and more than 100 refereed papers. He is a Guggenheim Fellow, an ACM Fellow, and an IEEE Fellow. Baer has held several editorial positions, including editor-in-chief of the Journal of VLSI and Computer Systems and editor of the IEEE Transactions on Computers, the IEEE Transactions on Parallel and Distributed Systems, and the Journal of Parallel and Distributed Computing. He has served as General Chair and Program Chair of several conferences, including ISCA and HPCA.
Inhaltsverzeichnis
1. Introduction; 2. The basics; 3. Superscalar processors; 4. Front-end: branch prediction, instruction fetching, and register renaming; 5. Back-end: instruction scheduling, memory access instructions, and clusters; 6. The cache hierarchy; 7. Multiprocessors; 8. Multithreading and (chip) multiprocessors; 9. Current limitations and future challenges.
Details
Erscheinungsjahr: 2013
Genre: Importe, Informatik
Rubrik: Naturwissenschaften & Technik
Medium: Buch
ISBN-13: 9780521769921
ISBN-10: 0521769922
Sprache: Englisch
Einband: Gebunden
Autor: Baer, Jean-Loup
Hersteller: Cambridge University Press
Verantwortliche Person für die EU: Libri GmbH, Europaallee 1, D-36244 Bad Hersfeld, gpsr@libri.de
Maße: 260 x 183 x 25 mm
Von/Mit: Jean-Loup Baer
Erscheinungsdatum: 06.12.2013
Gewicht: 0,912 kg
Artikel-ID: 101414773
Über den Autor
Jean-Loup Baer is Professor Emeritus of Computer Science and Engineering at the University of Washington, where he has been since 1969. Professor Baer is the author of Computer Systems Architecture and more than 100 refereed papers. He is a Guggenheim Fellow, an ACM Fellow, and an IEEE Fellow. Baer has held several editorial positions, including editor-in-chief of the Journal of VLSI and Computer Systems and editor of the IEEE Transactions on Computers, the IEEE Transactions on Parallel and Distributed Systems, and the Journal of Parallel and Distributed Computing. He has served as General Chair and Program Chair of several conferences, including ISCA and HPCA.
Inhaltsverzeichnis
1. Introduction; 2. The basics; 3. Superscalar processors; 4. Front-end: branch prediction, instruction fetching, and register renaming; 5. Back-end: instruction scheduling, memory access instructions, and clusters; 6. The cache hierarchy; 7. Multiprocessors; 8. Multithreading and (chip) multiprocessors; 9. Current limitations and future challenges.
Details
Erscheinungsjahr: 2013
Genre: Importe, Informatik
Rubrik: Naturwissenschaften & Technik
Medium: Buch
ISBN-13: 9780521769921
ISBN-10: 0521769922
Sprache: Englisch
Einband: Gebunden
Autor: Baer, Jean-Loup
Hersteller: Cambridge University Press
Verantwortliche Person für die EU: Libri GmbH, Europaallee 1, D-36244 Bad Hersfeld, gpsr@libri.de
Maße: 260 x 183 x 25 mm
Von/Mit: Jean-Loup Baer
Erscheinungsdatum: 06.12.2013
Gewicht: 0,912 kg
Artikel-ID: 101414773
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