Ahmet Bindal received his M.S. and Ph.D. degrees in Electrical Engineering Department from the University of California, Los Angeles CA. His doctoral research was the material characterization for high electron mobility GaAs transistors. During his graduate program, he was a graduate research associate and technical consultant for Hughes Aircraft Co. In 1988, he joined the technical staff of IBM Research and Development Center in Fishkill, NY, where he worked as a device design and characterization engineer. He developed asymmetrical MOS transistors and ultra thin Silicon-On-Insulator (SOI) technologies for IBM. In 1993, he transferred to IBM in Rochester, MN, as a senior circuit design engineer to work on the floating-point unit for AS-400 main frame processor. He continued his circuit design career at Intel Corporation in Santa Clara, CA, where he designed 16-bit packed multipliers and adders for the MMX unit for Pentium II processors. In 1996, he joined Philips Semiconductorsin Sunnyvale, CA, where he was involved in the designs of instruction/data caches and various SRAM modules for the Trimedia processor. His involvement with VLSI architecture started in Philips Semiconductors and led to the design of the Video-Out and Image Co-Processor units for the same processor. In 1998, he joined Cadence Design Systems as a VLSI architect and directed a team of engineers to design self-timed asynchronous processors. Staring 2000 he implemented 802.11a and 802.11b wireless LAN protocols in VLSI. After approximately 20 years of industry work, he joined the Computer Engineering faculty at San Jose State University in 2002. His current research interests range from Nano-Scale Electron Devices to VLSI Design and Nano-Scale Architectures. Dr. Bindal has over 20 scientific journal and conference publications and 10 invention disclosures with IBM; he currently holds 3 U.S. patents with IBM and 1 with Intel Corporation.

Provides semester-length textbook for students in computer and electrical engineering, covering the design of complex computing blocks from architectural specifications

Focuses not only on CPU architecture, but also covers in detail system buses, peripherals and memories

Presented in a manner catering to young engineering minds, this textbook minimizes text, while using a systematic design approach with architectural schematics, timing diagrams and control circuits

Includes extensive exercises and projects at the end of each chapter

Solutions to review problems and PowerPoint slides for instructors available

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Review Of Combinational Circuits.- Review Of Sequential Circuits.- Review Of Asynchronous Circuits.- System Bus.- Memory Circuits And Systems.- Central Processing Unit.- System Peripherals.- Special Topics.- Appendix.